HD74LV1GT126A Datasheet - Renesas Technology

HD74LV1GT126A Bus Buffer Gate

The HD74LV1GT126A has a bus buffer gate with 3 *state output in a 5 pin package. Output is disabled when the associated output enable (OE) input is low. To ensure the high impedance state during power up or power down, OE should be connected to VCC through a pull-down resistor; the minimum va.

HD74LV1GT126A Features

* The basic gate function is lined up as Renesas uni logic series.

* Supplied on emboss taping for high-speed automatic mounting.

* TTL compatible input level. Supply voltage range : 3.0 to 5.5 V Operating temperature range :

* 40 to +85°C

* Logic-level transla

HD74LV1GT126A Datasheet (130.32 KB)