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8T74S208C-01

LVDS Clock Divider and Fanout Buffer

8T74S208C-01 Features

* One differential input reference clock Differential pair can accept the following differential input levels: LVDS, LVPECL, CML Integrated input termination resistors Eight LVDS outputs Selectable clock frequency division of ÷1, ÷2, ÷4 and ÷8 Maximum input clock frequency: 1GHz LVCMOS interface level

8T74S208C-01 General Description

The 8T74S208C-01 is a high-performance differential LVDS clock divider and fanout buffer. The device is designed for the frequency division and signal fanout of high-frequency, low phase-noise clocks. The 8T74S208C-01 is characterized to operate from a 2.5V power supply. Guaranteed output-to-output .

8T74S208C-01 Datasheet (634.20 KB)

Preview of 8T74S208C-01 PDF

Datasheet Details

Part number:

8T74S208C-01

Manufacturer:

Renesas ↗

File Size:

634.20 KB

Description:

Lvds clock divider and fanout buffer.

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TAGS

8T74S208C-01 LVDS Clock Divider and Fanout Buffer Renesas

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