8T74S208C-01 Datasheet, Buffer, Renesas

8T74S208C-01 Features

• Buffer One differential input reference clock Differential pair can accept the following differential input levels: LVDS, LVPECL, CML Integrated input termination resistors Eight LVDS outputs

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Part number:

8T74S208C-01

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Renesas ↗

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📄 Datasheet

Description:

Lvds clock divider and fanout buffer. The 8T74S208C-01 is a high-performance differential LVDS clock divider and fanout buffer. The device is designed for the frequency di

8T74S208C-01 Application

• Applications demanding well-defined performance and repeatability. The integrated input termination resistors make interfacing to the reference sour

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8T74S208C-01

Renesas

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