HD74ACT112 - Dual JK Negative Edge-Triggered Flip-Flop
HD74ACT112 Features
* individual J, K, Clock and asynchronous Set and Clear inputs to each flipflop. When the clock goes High, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may change when the clock is High and the bistable will perform according to the Truth Table as long as min