HD74LVC125A Datasheet - Renesas

HD74LVC125A Quad. Bus Buffer Gates

The HD74LVC125A has four bus buffer gates in a 14 pin package. The device require the three state control input C to be taken high to put the output into the high impedance condition, whereas the device requires the control input to be low to put the output into high impedance. Low voltage and high-.

HD74LVC125A Features

* VCC = 2.0 V to 5.5 V

* All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)

* All outputs VOUT (Max.) = 5.5 V (@VCC = 0 V or output off state)

* Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)

* Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, T

HD74LVC125A-Renesas.pdf