ISL9000A Datasheet - Renesas

ISL9000A Dual LDO

PIN NUMBER 1 PIN NAME VIN 2 EN1 3 EN2 4 CBYP 5 CPOR 6 GND 7 POR1 8 POR2 9 VO2 10 VO1 TYPE DESCRIPTION Analog I/O Supply Voltage/LDO Input: Connect a 1µF, X5R ceramic capacitor to GND. Low Voltage Compatible LDO-1 Enable. CMOS Input Low Voltage Compatible LDO-2 Enable. CMOS.

DATASHEET ISL9000A Dual LDO with Low Noise, Very High PSRR and Low IQ FN6391 Rev 3.00 October 15, 2015 ISL9000A is a high performance dual LDO capable of sourcing 300mA current from each output. It has a low standby current and very high PSRR and is stable with output capacitance of 1µF to 10µF with ESR of up to 200m. The device integrates an individual Power-On-Reset (POR) function for each output. The POR delay for VO2 can be externally programmed by connecting a timing capacitor to the CP.

ISL9000A Features

* Integrates two 300mA high performance LDOs

* Excellent transient response to large current steps

* ±1.8% accuracy over all operating conditions

* Excellent load regulation: < 0.1% voltage change across full range of load current

* Low output noise: typically

ISL9000A Datasheet (649.67 KB)