K4S281632M - 128Mbit SDRAM 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL

Datasheet Summary

Description

The K4S281632M is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 16 bits, fabricated with SAMSUNG′s high performance CMOS technology.

Features

JEDEC standard 3.3V power supply.
LVTTL compatible with multiplexed address.
Four banks operation.
MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave).
All inputs are sampled at the positive going edge of the system clock.
Burst read single-bit write operation.
DQM for masking.
Auto & self refresh.
64ms refresh period (4K cycle.

Samsung semiconductor

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Datasheet Details

Part number	K4S281632M
Manufacturer	Samsung semiconductor
File Size	87.41 KB
Description	128Mbit SDRAM 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL
Datasheet	K4S281632M Datasheet
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Other Datasheets by Samsung semiconductor

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K4S281632M CMOS SDRAM 128Mbit SDRAM 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL Revision 0.0 Aug. 1999 Samsung Electronics reserves the right to change products or specification without notice. Rev. 0.0 Aug. 1999 K4S281632M 2M x 16Bit x 4 Banks Synchronous DRAM FEATURES • JEDEC standard 3.3V power supply • LVTTL compatible with multiplexed address • Four banks operation • MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave) • All inputs are sampled at the positive going edge of the system clock.

Published: Apr 7, 2005 |