Description
KM416S8030B CMOS SDRAM 128Mbit SDRAM 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL Revision 0.1 June 1999 * Samsung Electronics reserves the rig.
The KM416S8030B is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 16 bits, fabricated with SAMSUNG′s high.
Features
* JEDEC standard 3.3V power supply
* LVTTL compatible with multiplexed address
* Four banks operation
* MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave)
* All inputs are
Applications
* ORDERING INFORMATION
Max Freq. 133MHz(CL=3) 125MHz(CL=3) 100MHz(CL=2) 100MHz(CL=3) LVTTL 54 TSOP(II) Interface Package
KM416S8030BT-G/F10 66MHz(CL=2 &3)
FUNCTIONAL BLOCK DIAGRAM
I/O Control
LWE LDQM
Data Input Register
Bank Select 2M x 16 Sense AMP 2M x 16 2M x 16 2M x 16 Refresh Counter
Ou