KM416S8030BN Datasheet (Samsung semiconductor) - 128Mb SDRAM Shrink TSOP 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL

KM416S8030BN, 128Mb SDRAM Shrink TSOP 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL

The KM416S8030B is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 16 bits, fabricated with SAMSUNG′s high performance CMOS technology.

Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every cloc

shrink-TSOP KM416S8030BN Preliminary CMOS SDRAM 128Mb SDRAM Shrink TSOP 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL www.DataSheet4U.com Revision 0.1 Aug.

1999 Samsung Electronics reserves the right to change products or specification without notice.

Rev.

0.1 Aug.

1999 shrink-TSOP KM416S8030BN Revision History Version 0.0 (July 2, 1999, Preliminary) Preliminary specification for shrink-TSOP.

Preliminary CMOS SDRAM Version 0.1 (August 24, 1999, Preliminary) Added Note 5

KM416S8030BN Features

* JEDEC standard 3.3V power supply

* LVTTL compatible with multiplexed address

* Four banks operation

* MRS cycle with address key programs - CAS latency (2 & 3) - Burst length (1, 2, 4, 8 & Full page) - Burst type (Sequential & Interleave)

* All inputs are sa