LC8905V Datasheet PDF - Sanyo Digital Audio Interface Receiver Specs

LC8905V - Digital Audio Interface Receiver

Datasheet Summary

Description

Data input with built-in amplifier (for coaxial or optical module input) Data input (for optical module input) Emphasis, input bi-phase, and validity flag output Power supply VCO gain control input VCO free-running setting input PLL low-pass filter setting Ground System clock selection input (384fs

Features

On-chip PLL circuit synchronizes with the transmitted IEC 958 and EIAJ CP-1201 format signal.
Provides 128fs, bit, and L/R clock outputs.
System clock can be selected to be either 384fs or 512fs.
Microprocessor interface code settings for different output types.
Input pin, emphasis output, input bi-phase data output, and validity flag output settings.
Audio data output format setting.
Channel status output (32-bit output for cons.

Datasheet Details

Part number	LC8905V
Manufacturer	Sanyo
File Size	224.18 KB
Description	Digital Audio Interface Receiver
Datasheet	LC8905V Datasheet
Additional preview pages of the LC8905V datasheet.

📁 Similar Datasheet

LC89052T - Digital Audio Interface Receiver (Sanyo Semicon Device)

LC89052TA-E - Digital Audio Interface Receiver (Sanyo Semicon Device)

LC89057W-VF4A-E - Digital Audio Interface Receiver (ON Semiconductor)

LC89057W-VF4A-E - Digital Audio Interface Transceiver (Sanyo Semicon Device)

LC89058W-E - Digital Audio Interface Receiver (Sanyo Semicon Device)

LC89058W-E - Digital Audio Interface Receiver (ON Semiconductor)

LC89075W-H - Digital Audio Interface Receiver (Sanyo Semicon Device)

LC89075WA - Digital Audio Interface Receiver (ON Semiconductor)

LC89091JA - Digital Audio Interface Receiver (ON Semiconductor)

LC8935 - CMOS LSI (Sanyo Semicon Device)

Full PDF Text Transcription

Click to expand full text

Ordering number : EN*5237 CMOS LSI LC8905V Digital Audio Interface Receiver Preliminary Overview The LC8905V is for use in IEC 958 and EIAJ CP-1201 format data transmission between digital audio equipment. This LSI is used on the receiving side, and handles synchronization with the input signal and demodulation of that signal to a normal format signal. Package Dimensions unit: mm 3175A-SSOP24 [LC8905V] Features • On-chip PLL circuit synchronizes with the transmitted IEC 958 and EIAJ CP-1201 format signal. • Provides 128fs, bit, and L/R clock outputs. • System clock can be selected to be either 384fs or 512fs.

Published: Apr 25, 2005 |