Description
Voltage detection pin between VM and VSS (Overcurrent detection pin) Positive power input pin Negative power input pin FET gate connection pin for discharge control (CMOS output) FET gate connection pin for charge control (CMOS output)
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Figure 2
Features
- s
(1)
Internal high-accuracy voltage detection circuit.
- Overcharge detection voltage: 3.9 V to 4.4 V (5 mV-step) Accuracy of ± 25 mV(+25°C) and ± 30 mV(.
- 5°C to +55°C).
- Overcharge release voltage 3.8 V to 4.4 V.
- 1 Accuracy of ±50 mV.
- 1. Overcharge release voltage = Overcharge detection voltage - Overcharge hysteresis The overcharge hysteresis can be selected in the range 0.0, or 0.1 to 0.4 V in 50mV steps. (However, selection "Overcharge release voltage.
S8241ABPMC_SeikoInstruments.pdf
