W3E16M64S-XBX - 16Mx64 DDR SDRAM
The 128MByte (1Gb) DDR SDRAM is a high-speed CMOS, dynamic random-access, memory using 4 chips containing 268,435,456 bits.
Each chip is internally configured as a quad-bank DRAM.
Each of the chip’s 67,108,864-bit banks is organized as 8,192 rows by 512 columns by 16 bits.
The 128 MB DDR SDRAM uses a
W3E16M64S-XBX Features
* DDR Data Rate = 200, 250, 266Mbps Package:
* 219 Plastic Ball Grid Array (PBGA), 21 x 25mm 2.5V ±0.2V core power supply 2.5V I/O (SSTL_2 compatible) Differential clock inputs (CLK and CLK#) Commands entered on each positive CLK edge Internal pipelined double-data-rate (DDR) architecture; two
