* 1 Dual 1:2 Differential Buffer
* Two Clock Inputs
* Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL
* Four LVPECL Outputs
* Maximum Clock Frequency: 2 GHz
* Maximum Core Current Consumption: 48 mA
* Very Low Additive Jitter:
CDCLVP2102 Datasheet (1.32 MB)
CDCLVP2102
1.32 MB
High-performance clock buffer.
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CDCLVP2102
SCAS881C
* AUGUST 2009
* REVISED .
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