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CDCLVP2102 High-Performance Clock Buffer

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Description

Product Folder Sample & Buy Technical Documents Tools & Software Support & Community CDCLVP2102 SCAS881C * AUGUST 2009 * REVISED .
The CDCLVP2102 is a highly versatile, low additive jitter buffer that can generate four copies of LVPECL clock outputs from two LVPECL, LVDS, or LVCMO.

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Features

* 1 Dual 1:2 Differential Buffer
* Two Clock Inputs
* Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL
* Four LVPECL Outputs
* Maximum Clock Frequency: 2 GHz
* Maximum Core Current Consumption: 48 mA
* Very Low Additive Jitter:

Applications

* Wireless Communications
* Telecommunications/Networking
* Medical Imaging

CDCLVP2102 Distributors

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