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CDCLVP2108 High-Performance Clock Buffer

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Description

Product Folder Sample & Buy Technical Documents Tools & Software Support & Community CDCLVP2108 SCAS878C * MAY 2009 * REVISED JAN.
The CDCLVP2108 is a highly versatile, low additive jitter buffer that can generate 16 copies of LVPECL clock outputs from two LVPECL, LVDS, or LVCMOS.

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Features

* 1 Dual 1:8 Differential Buffer
* Two Clock Inputs
* Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL
* 16 LVPECL Outputs
* Maximum Clock Frequency: 2 GHz
* Maximum Core Current Consumption: 115 mA
* Very Low Additive Jitter:

Applications

* Wireless Communications
* Telecommunications/Networking
* Medical Imaging

CDCLVP2108 Distributors

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