* 1 Dual 1:8 Differential Buffer
* Two Clock Inputs
* Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL
* 16 LVPECL Outputs
* Maximum Clock Frequency: 2 GHz
* Maximum Core Current Consumption: 115 mA
* Very Low Additive Jitter:
CDCLVP2108 Datasheet (2.15 MB)
CDCLVP2108
2.15 MB
High-performance clock buffer.
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CDCLVP2108
SCAS878C
* MAY 2009
* REVISED JAN.
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