* 1 Dual 1:6 Differential Buffer
* Two Clock Inputs
* Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL
* 12 LVPECL Outputs
* Maximum Clock Frequency: 2 GHz
* Maximum Core Current Consumption: 92 mA
* Very Low Additive Jitter:
CDCLVP2106 Datasheet (1.74 MB)
CDCLVP2106
1.74 MB
High-performance clock buffer.
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CDCLVP2106
SCAS887B
* SEPTEMBER 2009
* REVIS.
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