SN74SSTV16859 Datasheet - Texas Instruments

SN74SSTV16859 13-BIT TO 26-BIT REGISTERED BUFFER

ordering information This 13-bit to 26-bit registered buffer is designed for 2.3-V to 2.7-V VCC operation. All inputs are SSTL_2, except the LVCMOS reset (RESET) input. All outputs are SSTL_2, Class II compatible. The SN74SSTV16859 operates from a differential clock (CLK and CLK). Data are registere.

D Member of the Texas Instruments Widebus Family D 1-to-2 Outputs to Support Stacked DDR DIMMs D Supports SSTL_2 Data Inputs D Outputs Meet SSTL_2 Class II Specifications D Differential Clock (CLK and CLK) Inputs D Supports LVCMOS Switching Levels on the RESET Input D RESET Input Disables Differential Input Receivers, Resets All Registers, and Forces All Outputs Low D Pinout Optimizes DIMM PCB Layout D Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II D ESD Protection Exceeds JESD 22

SN74SSTV16859-etcTI.pdf