SN74SSTV32852-EP - 24-Bit To 48-Bit Registered Buffer
ORDERING INFORMATION This 24-bit to 48-bit registered buffer is designed for 2.3-V to 2.7-V VCC operation.
All inputs are SSTL_2, except the LVCMOS reset (RESET) input.
All outputs are SSTL_2, Class II compatible.
The SN74SSTV32852 operates from a differential clock (CLK and CLK).
Data are registere
SN74SSTV32852-EP Features
* 1
* 2 Controlled Baseline
* One Assembly/Test Site, One Fabrication Site
* Extended Temperature Performance of
* 40°C to 85°C
* Enhanced Diminishing Manufacturing Sources (DMS) Support
* Enhanced Product-Change Notification
* Qualification Pedigr
