Datasheet4U.com

74AUP1G175-Q100 - Low-power D-type flip-flop

nexperia

📥 Download Datasheet

74AUP1G175-Q100 Datasheet Preview — Preview of 74AUP1G175-Q100 PDF

datasheet Preview Page 2

datasheet Preview Page 3

Datasheet Details

Part number	74AUP1G175-Q100
Manufacturer	nexperia ↗
File Size	262.20 KB
Description	Low-power D-type flip-flop
Datasheet	74AUP1G175-Q100-nexperia.pdf

74AUP1G175-Q100 Product details

Description

The 74AUP1G175 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), master reset (MR) inputs, and Q output.

Features

Automotive product qualification in accordance with AEC-Q100 (Grade 1).
Specified from -40 °C to +85 °C and from -40 °C to +125 °C.
Wide supply voltage range from 0.8 V to 3.6 V.
CMOS low power dissipation.
High noise immunity.
Complies with JEDEC standards:.
JESD8-12 (0.8 V to 1.3 V).
JESD8-11 (0.9 V to 1.65 V).
JESD8-7 (1.2 V to 1.95 V).
JESD8-5 (1.8 V to 2.7 V).
JESD8C (2.7 V to 3.6 V).

📁 74AUP1G175-Q100 Similar Datasheet

74AUP1G175 - Low Power D-Type Flip-Flop (NXP)
74AUP1G17 - Low-power Schmitt-trigger buffer (NXP)
74AUP1G11 - Low-power 3-input AND gate (NXP)
74AUP1G125 - Low-power buffer/line driver (NXP Semiconductors)
74AUP1G126 - Low-Power buffer/line driver (NXP)
74AUP1G14 - Low-power Schmitt-trigger inverter (NXP)
74AUP1G00 - Low-power 2-input NAND gate (NXP Semiconductors)
74AUP1G02 - Low-power 2-input NOR gate (NXP)

Other Datasheets by nexperia

74AUP1G125-Q100 - Low-power buffer/line driver
74AUP1G132 - Low-power 2-input NAND Schmitt trigger
74AUP1G132-Q100 - Low-power 2-input NAND Schmitt trigger
74AUP1G157 - Low-power 2-input multiplexer
74AUP1G157-Q100 - Low-power 2-input multiplexer
74AUP1G158 - Low-power 2-input multiplexer

Published: Jul 29, 2019 |