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049
PRELIMINARY
CY7C1049
512K x 8 Static RAM
Features
• High speed — tAA = 15 ns • Low active power — 1210 mW (max.) • Low CMOS standby power (Commercial L version) — 2.75 mW (max.) • 2.0V www.DataSheet4U.com Data Retention (400 µW at 2.0V retention) • Automatic power-down when deselected • TTL-compatible inputs and outputs • Easy memory expansion with CE and OE features is provided by an active LOW chip enable (CE), an active LOW output enable (OE), and three-state drivers. Writing to the device is accomplished by taking chip enable (CE) and write enable (WE) inputs LOW. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A18).