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M12L128168A-5TG - 2M x 16 Bit x 4 Banks Synchronous DRAM

General Description

The M12L128168A is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 16 bits.

Key Features

  • y JEDEC standard 3.3V power supply y LVTTL compatible with multiplexed address y Four banks operation y MRS cycle with address key programs - CAS Latency ( 2 & 3 ) - Burst Length ( 1, 2, 4, 8 & full page ) - Burst Type ( Sequential & Interleave ) y All inputs are sampled at the positive going edge of the system clock y Burst Read single write operation y DQM for masking y Auto & self refresh y 64ms refresh period (4K cycle).

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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ESMT SDRAM FEATURES y JEDEC standard 3.3V power supply y LVTTL compatible with multiplexed address y Four banks operation y MRS cycle with address key programs - CAS Latency ( 2 & 3 ) - Burst Length ( 1, 2, 4, 8 & full page ) - Burst Type ( Sequential & Interleave ) y All inputs are sampled at the positive going edge of the system clock y Burst Read single write operation y DQM for masking y Auto & self refresh y 64ms refresh period (4K cycle) ORDERING INFORMATION M12L128168A 2M x 16 Bit x 4 Banks Synchronous DRAM PRODUCT NO. MAX FREQ.