ST3401SRG Datasheet | Stanson Technology

P Channel Enhancement Mode MOSFET -4.0A DESCRIPTION ST3401RSG is the P-Channel logic enhancement mode power field effect transistor which is produced using high cell density DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone and notebook puter power management, other battery powered circuits, and low in-line power loss are required. The product is in a very small outline surface mount package. PIN CONFIGURATION SOT-23 FEATURE 1.Gate 2.Source 3.Drain PART MARKING SOT-23 -30V/-4.0A, RDS(ON) = 55mΩ (Typ.) @VGS = -10V -30V/-3.2A, RDS(ON) = 62mΩ @VGS = -4.5V -30V/-1.2A, RDS(ON) = 90mΩ @VGS = -2.5V Super high density cell design for Extremely low RDS(ON) Exceptional on-resistance and maximum DC current capability SOT-23 package design A1YA Y: Year Code A: Process Code STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA http://.stansontech. STP3401SRG 2009. V1 P Channel Enhancement Mode MOSFET -4.0A ABSOULTE MAXIMUM RATINGS (Ta = 25℃ Unless otherwise noted ) Parameter Symbol Typical Drain-Source Voltage Gate-Source Voltage Continuous Drain Current TJ=150℃) TA=25℃ TA=70℃ Pulsed Drain Current VDSS VGSS ID...