ST3403 Datasheet | Stanson Technology

DESCRIPTION The ST3403 is the P-Channel logic enhancement mode power field effect transistor are produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone and notebook puter power management and other batter powered circuits, and low in-line power loss are needed in a very small outine surface mount package. PIN CONFIGURATION SOT-23-3L 3 FEATURE -30V/-2.8A, RDS(ON) = 105m-ohm @VGS = -10V -30V/-2.5A, RDS(ON) = 115m-ohm @VGS = -4.5V -30V/-1.5A, RDS(ON) = 155m-ohm @VGS = -2.5V RDS(ON) =255m-ohm @VGS = -1.8V Super high density cell design for extremely low RDS(ON) Exceptional on-resistance and maximum DC current capability SOT-23-3L package design 1.Gate 2.Source 3.Drain A3YA 1 2 Y: Year Code A: Process Code STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA TEL: (650) 9389294 FAX: (650) 9389295 Page 1 P Channel Enchancement Mode MOSFET -3.5A ABSOLUTE MAXIMUM RATINGS (Ta = 25¢J Unless otherwise noted ) Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current (TJ=150¢J ) TA=25¢J TA=70¢J Pulsed Drain Current Continuous Source Current (Diode Conduction) Power Dissipation Operation Junction Temperature Storgae Temperature Range Thermal Resistance-Junction to Ambient TA=25¢J TA=70¢J Symbol VDSS VGSS ID IDM IS PD TJ TSTG R£c Typical -30 +/-12 -3.5 -2.8 -20 -1.4 1.25 0.81 150 -55/150 105 Unit V V A A A W ¢J ¢J ¢J /W STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA TEL: (650) 9389294 FAX: (650) 9389295 Page 2 P Channel Enchancement Mode MOSFET -3.5A ELECTRICAL CHARACTERISTICS ( Ta = 25¢J Unless otherwise noted ) Parameter Symbol Condition Min Typ Max Unit Static Drain-Source Breakdown Voltage Gate Threshold Voltage Gate Leakage Current Zero Gate Voltage Drain Current On-State Drain Current Drain-source...