Master-slave Datasheet | Specifications & PDF Download

DM74LS73A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs August 1986 Revised March 2000 DM74LS73A Dua

Rating: 1 ★ (6 votes)

HCC/HCF4095B HCC/HCF4096B GATE J-K MASTER-SLAVE FLIP-FLOPS . . . . . . . 16 MHz TOGGLE RATE (typ.) AT VDD - VSS = 10V GATED INPUTS QUIESCENT CURRENT

Rating: 1 ★ (5 votes)

HCC/HCF4095B HCC/HCF4096B GATE J-K MASTER-SLAVE FLIP-FLOPS . . . . . . . 16 MHz TOGGLE RATE (typ.) AT VDD - VSS = 10V GATED INPUTS QUIESCENT CURRENT

Rating: 1 ★ (5 votes)

Rating: 1 ★ (5 votes)

DM7476 Dual Master-Slave J-K Flip-Flops with Clear, Preset, and Complementary Outputs September 1986 Revised July 2001 DM7476 Dual Master-Slave J-K

Rating: 1 ★ (5 votes)

TC4027BP/BF/BFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4027BP,TC4027BF,TC4027BFN TC4027B Dual J-K Master-Slave Flip Flop TC4027

Rating: 1 ★ (5 votes)

Rating: 1 ★ (5 votes)

HCC/HCF4095B HCC/HCF4096B GATE J-K MASTER-SLAVE FLIP-FLOPS . . . . . . . 16 MHz TOGGLE RATE (typ.) AT VDD - VSS = 10V GATED INPUTS QUIESCENT CURRENT

Rating: 1 ★ (4 votes)

HCC/HCF4027B DUAL-J-K MASTER-SLAVE FLIP-FLOP . . . . . . . . SET-RESET CAPABILITY STATIC FLIP-FLOP OPERATION - RETAINS STATE INDEFINITELY WITH CLOCK

Rating: 1 ★ (4 votes)

Rating: 1 ★ (4 votes)

DM54LS107A DM74LS107A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs June 1989 DM54LS107A DM74LS107A

Rating: 1 ★ (4 votes)

RDA012M4MS DATASHEET DS_0017PB0-2805 www.DataSheet4U.com RDA012M4MS 12 Bit 1.3 GS/s Master-Slave 4:1 MUXDAC Features ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ 12

Rating: 1 ★ (4 votes)

CD4027BC Dual J-K Master/Slave Flip-Flop with Set and Reset October 1987 Revised January 1999 CD4027BC Dual J-K Master/Slave Flip-Flop with Set and

Rating: 1 ★ (4 votes)

CD4027BC Dual J-K Master/Slave Flip-Flop with Set and Reset October 1987 Revised January 1999 CD4027BC Dual J-K Master/Slave Flip-Flop with Set and

Rating: 1 ★ (4 votes)

CD4027BC Dual J-K Master/Slave Flip-Flop with Set and Reset October 1987 Revised January 1999 CD4027BC Dual J-K Master/Slave Flip-Flop with Set and

Rating: 1 ★ (4 votes)

DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs August 1986 Revised April 2000 DM74S1

Rating: 1 ★ (4 votes)

5476 DM5476 DM7476 Dual Master-Slave J-K Flip-Flops with Clear Preset and Complementary Outputs June 1989 5476 DM5476 DM7476 Dual Master-Slave J-K F

Rating: 1 ★ (4 votes)

Data sheet acquired from Harris Semiconductor SCHS032C − Revised October 2003 The CD4027B types are supplied in 16-lead hermetic dual-in-line ceramic

Rating: 1 ★ (4 votes)

LM4308 www.ti.com SNLS225C – AUGUST 2007 – REVISED MAY 2013 LM4308 Mobile Pixel Link Two (MPL-2) – 18-bit CPU Display Interface Master/Slave Check

Rating: 1 ★ (3 votes)

HCC/HCF4095B HCC/HCF4096B GATE J-K MASTER-SLAVE FLIP-FLOPS . . . . . . . 16 MHz TOGGLE RATE (typ.) AT VDD - VSS = 10V GATED INPUTS QUIESCENT CURRENT

Rating: 1 ★ (3 votes)