CY2DP314 buffer equivalent, 1 of 2:4 differential clock/data fanout buffer.
* Four ECL/PECL differential outputs
* One ECL/PECL differential or single-ended inputs (CLKA)
* One HSTL differential or single-ended inputs (CLKB)
* Hot.
The device is implemented on SiGe technology and has a fully differential internal architecture that is optimized to ac.
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