GVT71256C36
Features
- Fast access times: 2.5 ns, 3.0 ns, and 3.5 ns
- Fast clock speed: 225 MHz, 200 MHz, 166 MHz, and 150 MHz
- Fast OE access times: 2.5 ns, 3.0 ns, and 3.5 ns
- Optimal for performance (two cycle chip deselect, depth expansion without wait state)
- 3.3V
- 5% and +10% power supply
- 3.3V or 2.5V I/O supply
- 5V tolerant inputs except I/Os
- Clamp diodes to V SS at all inputs and outputs
- mon data inputs and data outputs
- Byte Write Enable and Global Write control
- Multiple chip enables for depth expansion: three chip enables for TA(GVTI)/A(CY) package version and two chip enables for B(GVTI)/BG(CY) and T(GVTI)/AJ(CY) package versions
- Address pipeline capability
- Address, data and control registers
- Internally self-timed Write Cycle
- Burst control pins (interleaved or linear burst sequence)
- Automatic power-down for portable applications
- JTAG boundary scan for B and T package version
- Low profile 119-bump, 14-mm x 22-mm PBGA (Ball Grid Array) and 100-pin TQFP packages...