Datasheet4U Logo Datasheet4U.com

ICS889831 - 1-TO-4 DIFFERENTIAL LVPECL-TO-LVPECL/ECL FANOUT BUFFER

General Description

The ICS889831 is a high speed 1-to-4 Differentialto-LVPECL/ECL Fanout Buffer and is a member HiPerClockS™ of the HiPerClockS™ family of high performance clock solutions from ICS.

Key Features

  • 4 differential LVPECL/ECL outputs.
  • IN, nIN pair can accept the following differential input levels: LVPECL, LVDS, CML, SSTL.
  • 50Ω internal input termination to VT.
  • Maximum output frequency: > 2.1GHz.
  • Output skew: 30ps (maximum).
  • Part-to-part skew: 185ps (maximum).
  • Additive phase jitter, RMS: 0.27ps (typical).
  • Propagation delay: 570ps (maximum).
  • LVPECL mode operating voltage supply range: VCC = 2.5V ± 5%, 3.3V ± 5%,.

📥 Download Datasheet

Datasheet Details

Part number ICS889831
Manufacturer ICS
File Size 311.10 KB
Description 1-TO-4 DIFFERENTIAL LVPECL-TO-LVPECL/ECL FANOUT BUFFER
Datasheet download datasheet ICS889831 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
ICS889832 1-TO-4 DIFFERENTIAL-TOLVDS FANOUT BUFFER IDT
ICS889872 DIFFERENTIAL-TO-LVDS BUFFER/DIVIDER W/INTERNAL TERMINATION IDT
ICS81006I VCXO-TO-LVCMOS OUTPUTS IDT
ICS810251I VCXO and Synchronous Ethernet Jitter Attenuator Integrated Device Technology
ICS82C404 Dual Programmable Graphics Frequency Generator Integrated Circuit Systems

Other Datasheets by ICS

Part Number Description
ICS889874 DIFFERENTIAL-TO-LVPECL BUFFER/DIVIDER
ICS810001-21 FEMTOCLOCKS-TM DUAL VCXO VIDEO PLL
ICS81006 VCXO-TO-6 LVCMOS OUTPUTS
ICS81006I VCXO-TO-6 LVCMOS OUTPUTS
ICS813001I LVPECL FEMTOCLOCK-TM PLL

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com Integrated Circuit Systems, Inc. ICS889831 LOW SKEW, 1-TO-4 DIFFERENTIAL LVPECL-TO-LVPECL/ECL FANOUT BUFFER FEATURES • 4 differential LVPECL/ECL outputs • IN, nIN pair can accept the following differential input levels: LVPECL, LVDS, CML, SSTL • 50Ω internal input termination to VT • Maximum output frequency: > 2.1GHz • Output skew: 30ps (maximum) • Part-to-part skew: 185ps (maximum) • Additive phase jitter, RMS: 0.27ps (typical) • Propagation delay: 570ps (maximum) • LVPECL mode operating voltage supply range: VCC = 2.5V ± 5%, 3.3V ± 5%, VEE = 0V • ECL mode operating voltage supply range: VCC = 0V, VEE = -3.3V ± 5%, 2.