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TC58DVM92A1FT0 Datasheet 512M-Bit CMOS NAND EPROM

Manufacturer: Toshiba

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General Description

The device is a single 3.3 V 512-Mbit (553,648,128) bit NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as 528 bytes u 32 pages u 4096 blocks.

The device has a 528-byte static register which allows program and read data to be transferred between the register and the memory cell array in 528-byte increments.

The Erase operation is implemented in a single block unit (16 Kbytes  512 bytes: 528 bytes u 32 pages).

Overview

TC58DVM92A1FTI0 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 512-MBIT (64M u 8 BITS) CMOS NAND E.

Key Features

  • x Organization Memory cell allay 528 u 128K u 8 Register 528 u 8 Page size 528 bytes Block size (16K  512) bytes x Modes Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Multi Block Program, Multi Block Erase x Mode control Serial input/output Command control x Power supply VCC 2.7 V to 3.6 V x Program/Erase Cycles 1E5 cycle (with ECC) x Access time Cell array to register 25 Ps max Serial Read Cycle 50 ns min x Operating current Read (50 ns cycle) 10 mA typ. Program (avg. ).

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