TC58DVM92A1FT0 Datasheet | Toshiba

TC58DVM92A1FTI0 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 512-MBIT (64M u 8 BITS) CMOS NAND E PROM DESCRIPTION The device is a single 3.3 V 512-Mbit (553,648,128) bit NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as 528 bytes u 32 pages u 4096 blocks. The device has a 528-byte static register which allows program and read data to be transferred between the register and the memory cell array in 528-byte increments. The Erase operation is implemented in a single block unit (16 Kbytes 512 bytes: 528 bytes u 32 pages). The device is a serial-type memory device which utilizes the I/O pins for both address and data input/output as well as for mand inputs. The Erase and Program operations are automatically executed making the device most suitable for applications such as solid-state file storage, voice recording, image file memory for still cameras and other systems which require high-density non-volatile memory data storage. 2 Features x Organization Memory cell allay 528 u 128K u 8 Register 528 u 8 Page size 528 bytes Block size (16K 512) bytes x Modes Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Multi Block Program, Multi Block Erase x Mode control Serial input/output mand control x Power supply VCC 2.7 V to 3.6 V x Program/Erase Cycles 1E5 cycle (with ECC) x Access time Cell array to register 25 Ps max Serial Read Cycle 50 ns min x Operating current Read (50 ns cycle) 10 mA typ. Program (avg.) 10 mA typ. Erase (avg.) 10 mA typ. Standby 50 PA max. x Package TSOPI48-P-1220-0.50 (Weight: 0.53g typ.) PIN ASSIGNMENT (TOP VIEW) NC NC NC NC NC GND RY / BY PIN NAMES 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 NC NC NC NC I/O8 I/O7 I/O6 I/O5 NC NC NC VCC VSS...