VG26S17400D Datasheet | Vanguard International Semiconductor

Description VG26(V)(S)17400D 4,194,304 x 4 - Bit CMOS Dynamic RAM The device is CMOS Dynamic RAM organized as 4,194,304 words x 4 bits. It is fabricated with an advanced submicron CMOS technology and designed to operate from a single 5V only or 3.3V only power supply. Low voltage operation is more suitable to be used on battery backup, portable electronic application. A new refresh feature called “ self-refresh “ is supported and very slow CBR cycles are being performed. It is packaged in JEDEC standard 26/24 - pin plastic SOJ or TSOP (II). Features - Single 5V ( ± 10 %) or 3.3V ( ± 10 %) only power supply - High speed t RAC access time : 50/60 ns - Low power dissipation - Active mode : 5V version 605/550 m W (Max.) 3.3V version 396/360 m W (Max.) - Standby mode : 5V version 1.375 m W (Max.) 3.3V version 0.54 m W (Max.) - Fast Page Mode access - I/O level : TTL patible (Vcc = 5V) LVTTL patible (Vcc = 3.3V) - 2048 refresh cycles in 32 ms (Std) or 128ms (S - version) - 4 refresh mode : - RAS only refresh - CAS-before-RAS refresh - Hidden refresh - Self - refresh (S - version) ee Data Sh . . Document:1G5-0126 4 U . Data Sheet Rev.1 Page 1 .. Pin configuration 26/24 - PIN 300mil Plastic SOP VSS DQ4 DQ3 CAS OE A9 VG26(V)(S)17400D 4,194,304 x 4 - Bit CMOS Dynamic RAM Pin configuration 26/24 - PIN 300mil Plastic TSOP (II) 26 25 24 23 22 21 VCC DQ1 DQ2 WE RAS...