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ZL30111 - POTS Line Card PLL

Description

The ZL30111 POTS line card PLL contains a digital phase-locked loop (DPLL), which provides timing and synchronization for SLIC/CODEC devices.

The ZL30111 generates TDM clock and framing signals that are phase locked to the input reference.

Features

  • Synchronizes to 8 kHz, 2.048 MHz, 8.192 MHz or 19.44 MHz input Provides a range of clock outputs: 2.048 MHz, 4.096 MHz and 8.192 MHz Provides 2 styles of 8 kHz framing pulses Automatic entry and exit from freerun mode on reference fail Provides DPLL lock and reference fail indication DPLL bandwidth of 922 Hz for all rates of input reference and 58 Hz for an 8 kHz input reference Less than 0.6 nspp intrinsic.

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Datasheet Details

Part number ZL30111
Manufacturer Zarlink Semiconductor
File Size 223.08 KB
Description POTS Line Card PLL
Datasheet download datasheet ZL30111 Datasheet

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Full PDF Text Transcription

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www.DataSheet4U.com ZL30111 POTS Line Card PLL Data Sheet Features • • • • • • • • • Synchronizes to 8 kHz, 2.048 MHz, 8.192 MHz or 19.44 MHz input Provides a range of clock outputs: 2.048 MHz, 4.096 MHz and 8.192 MHz Provides 2 styles of 8 kHz framing pulses Automatic entry and exit from freerun mode on reference fail Provides DPLL lock and reference fail indication DPLL bandwidth of 922 Hz for all rates of input reference and 58 Hz for an 8 kHz input reference Less than 0.
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