74HCT173D Datasheet - nexperia

Quad D-type flip-flop

* Complies with JEDEC standard no. 7A

* Input levels:

* For 74HC173: CMOS level

* For 74HCT173: TTL level

* Gated input enable for hold (do nothing) mode

* Gated output enable control mode

* Edge-triggered D-type register

* Asynchronous

74HCT173D

270.44 KB

Quad d-type flip-flop.

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74HCT173D Quad D-type flip-flop nexperia

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