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AS4C4M4E1 - 4M x 4 CMOS DRAM

AS4C4M4E1 Description

May 2001 ® AS4C4M4E1 4M×4 CMOS DRAM (EDO) family .
Address inputs Row address strobe Column address strobe Write enable Input/output Output enable Power Ground A0 to A10 t e U 4 .

AS4C4M4E1 Features

* Organization: 4,194,304 words × 4 bits
* High speed - 50/60 ns RAS access time - 25/30 ns column address access time - 12/15 ns CAS access time
* TTL-compatible, three-state I/O
* JEDEC standard package - 300 mil, 24/26-pin SOJ - 300 mil, 24/26-pin TSOP

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CMOS DRAM Alliance Semiconductor
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