AZ10LVEL33 Datasheet - Arizona Microtek

AZ10LVEL33 ECL/PECL / 4 Divider

The AZ10/100LVEL33 is an integrated ÷4 divider. The RESET pin is asynchronous and clears the output (Q Low, Q ¯ High) on the rising edge. Upon power-up, the internal flip-flop will be in a random logic state. RESET allows for the synchronization of multiple LVEL33’s in a system. The LVEL33 provides .

AZ10LVEL33 Features

* PACKAGE Green / RoHS Compliant / Lead (Pb) Free package available Operating Range of 3.0V to 5.5V 470ps Propagation Delay 4.0GHz Toggle Frequency Internal Input Pulldown Resistors Direct Replacement for ON Semiconductor

AZ10LVEL33 Datasheet (153.83 KB)