The AZ10/100LVEL33 is an integrated ÷4 divider.
The RESET pin is asynchronous and clears the output (Q Low, Q ¯ High) on the rising edge.
Upon power-up, the internal flip-flop will be in a random logic state.
RESET allows for the synchronization of multiple LVEL33’s in a system.
The LVEL33 provides
AZ10LVEL33 Features
* PACKAGE Green / RoHS Compliant / Lead (Pb) Free package available Operating Range of 3.0V to 5.5V 470ps Propagation Delay 4.0GHz Toggle Frequency Internal Input Pulldown Resistors Direct Replacement for ON Semiconductor
AZ100LVEL33_ArizonaMicrotek.pdf
Datasheet Details
AZ10LVEL33, AZ100LVEL33
Arizona Microtek
153.83 KB
Ecl/pecl / 4 divider.
This datasheet PDF includes multiple part numbers: AZ10LVEL33, AZ100LVEL33.
Please refer to the document for exact specifications by model.
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