Datasheet4U Logo Datasheet4U.com

CY7C1168KV18 18-Mbit DDR II+ SRAM Two-Word Burst Architecture

CY7C1168KV18 Description

CY7C1168KV18/CY7C1170KV18 18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) 18-Mbit DDR II+ SRAM Two-Word Burst Architecture .

CY7C1168KV18 Features

* 18-Mbit density (1M × 18, 512K × 36)
* 550-MHz clock for high bandwidth
* Two-word burst for reducing address bus frequency
* Double data rate (DDR) interfaces (data transferred at 1100 MHz) at 550 MHz
* Available in 2.5 clock cycle latency
* Two input clocks (K and K) for

📥 Download Datasheet

Preview of CY7C1168KV18 PDF
datasheet Preview Page 2 datasheet Preview Page 3

Datasheet Details

Part number
CY7C1168KV18
Manufacturer
Cypress Semiconductor
File Size
605.44 KB
Datasheet
CY7C1168KV18-CypressSemiconductor.pdf
Description
18-Mbit DDR II+ SRAM Two-Word Burst Architecture

📁 Related Datasheet

  • CY7C1006D - 1-Mbit (256K x 4) Static RAM (Cypress)
  • CY7C1011G - 2-Mbit (128K words x 16 bit) Static RAM (Cypress)
  • CY7C1041G - 4-Mbit (256K words x 16 bit) Static RAM (Cypress)
  • CY7C1041GE - 4-Mbit (256K words x 16 bit) Static RAM (Cypress)
  • CY7C1041GN - 4-Mbit (256K words x 16 bit) Static RAM (Cypress)
  • CY7C1049GN - 4-Mbit (512K words x 8 bit) Static RAM (Cypress)
  • CY7C1061DV33 - 16-Mbit (1 M X 16) Static RAM (Cypress)
  • CY7C1061G - 16-Mbit (1 M words x 16 bit) Static RAM (Cypress)

📌 All Tags

18-Mbit DDR II + SRAM Two-Word Burst Architecture Cypress Semiconductor
Cypress Semiconductor CY7C1168KV18-like datasheet