CY7C1357A, CY7C1355A Datasheet - Cypress Semiconductor

CY7C1357A (CY7C1355A / CY7C1357A) 256K x 36/512K x 18 Synchronous Flow-Thru SRAM

The CY7C1355A and CY7C1357A SRAMs are designed to eliminate dead cycles when transitions from READ to WRITE or vice versa. These SRAMs are optimized for 100 percent bus utilization and achieves Zero Bus Latency (ZBL). They integrate 262,144 × 36 and 524,288 × 18 SRAM cells, respectively, with advanc.

CY7C1357A Features

* Zero Bus Latency, no dead cycles between write and read cycles

* Fast access times: 2.5 ns, 3.0 ns, and 3.5 ns

* Fast clock speed: 133, 117, and 100 MHz

* Fast OE access time: 6.5, 7.0, and 7.5ns

* Internally synchronized registered outputs eliminate the nee

CY7C1355A_CypressSemiconductor.pdf

CY7C1357A Datasheet Preview — This datasheet PDF includes multiple part numbers: CY7C1357A, CY7C1355A. Please refer to the document for exact specifications by model.

Datasheet Details

Part number:

CY7C1357A, CY7C1355A

Manufacturer:

Cypress Semiconductor

File Size:

776.64 KB

Description:

(cy7c1355a / cy7c1357a) 256k x 36/512k x 18 synchronous flow-thru sram.

Note:

This datasheet PDF includes multiple part numbers: CY7C1357A, CY7C1355A.
Please refer to the document for exact specifications by model.

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TAGS

CY7C1357A CY7C1355A CY7C1355A CY7C1357A 256K 512K Synchronous Flow-Thru SRAM Cypress Semiconductor

CY7C1357A Distributor