CY7C1357B Datasheet - Cypress Semiconductor

(CY7C1355B / CY7C1357B) 9-Mb (256K x 36/512K x 18) Flow-Through SRAM

CY7C1357B Features

* No Bus Latency™ (NoBL™) architecture eliminates dead cycles between write and read cycles.

* Can support up to 133-MHz bus operations with zero wait states

* Data is transferred on every clock

* Pin compatible and functionally equivalent to ZBT™ devices

* In

CY7C1357B General Description

1] The CY7C1355B/CY7C1357B is a 3.3V, 256K x 36/ 512K x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1355B/CY7C1357B is equipped with the advanced No Bus Latency (NoBL) logic re.

CY7C1357B Datasheet (788.71 KB)

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Datasheet Details

Part number:

CY7C1357B

Manufacturer:

Cypress Semiconductor

File Size:

788.71 KB

Description:

(cy7c1355b / cy7c1357b) 9-mb (256k x 36/512k x 18) flow-through sram.

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TAGS

CY7C1357B CY7C1355B CY7C1357B 9-Mb 256K 512K Flow-Through SRAM Cypress Semiconductor

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CY7C1357B Features

CY7C1357B General Description

Datasheet Details

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