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CY7C1424AV18, CY7C1422AV18 Datasheet - Cypress Semiconductor

CY7C1424AV18 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture

The CY7C1422V18, CY7C1429AV18, CY7C1423V18, CY7C1424V18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II SIO (Double Data Rate Separate I/O) architecture. The DDR-II SIO consists of two separate ports to access the memory array. The Read port has dedicated Data outputs and the Write port ha.

CY7C1424AV18 Features

* 36-Mbit density (4M x 8, 4M x 9, 2M x 18, 1M x 36)

* 300-MHz clock for high bandwidth

* 2-Word burst for reducing address bus frequency

* Double Data Rate (DDR) interfaces (data transferred at 600 MHz) @ 300 MHz

* Two input clocks (K and K) for precise DDR t

CY7C1422AV18_CypressSemiconductor.pdf

CY7C1424AV18 Datasheet Preview — This datasheet PDF includes multiple part numbers: CY7C1424AV18, CY7C1422AV18. Please refer to the document for exact specifications by model.

Datasheet Details

Part number:

CY7C1424AV18, CY7C1422AV18

Manufacturer:

Cypress Semiconductor

File Size:

502.12 KB

Description:

36-mbit ddr-ii sio sram 2-word burst architecture.

Note:

This datasheet PDF includes multiple part numbers: CY7C1424AV18, CY7C1422AV18.
Please refer to the document for exact specifications by model.

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TAGS

CY7C1424AV18 CY7C1422AV18 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture Cypress Semiconductor

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