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CY7C1460AV33 36-Mbit Pipelined SRAM

CY7C1460AV33 Description

CY7C1460AV33 CY7C1462AV33 36-Mbit (1M × 36/2M × 18) Pipelined SRAM with NoBL™ Architecture 36-Mbit (1M × 36/2M × 18) Pipelined SRAM with NoBL™ Archit.
The CY7C1460AV33/CY7C1462AV33 are 3.

CY7C1460AV33 Features

* Pin compatible and functionally equivalent to ZBT
* Supports 250 MHz bus operations with zero wait states
* Available speed grades are 250, 200 and 167 MHz
* Internally self timed output buffer control to eliminate the need to use asynchronous OE
* Fully registered (inputs and

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36-Mbit Pipelined SRAM Cypress Semiconductor
Cypress Semiconductor CY7C1460AV33-like datasheet