CY7C1460AV33 Datasheet - Cypress Semiconductor

CY7C1460AV33 - 36-Mbit Pipelined SRAM

The CY7C1460AV33/CY7C1462AV33 are 3.3 V, 1M × 36/2M × 18 synchronous pipelined burst SRAMs with No Bus Latency™ (NoBL logic, respectively.

They are designed to support unlimited true back-to-back read/write operations with no wait states.

The CY7C1460AV33/CY7C1462AV33 are equipped with the advance

CY7C1460AV33 Features

* Pin compatible and functionally equivalent to ZBT

* Supports 250 MHz bus operations with zero wait states

* Available speed grades are 250, 200 and 167 MHz

* Internally self timed output buffer control to eliminate the need to use asynchronous OE

* Fully registered (inputs and

Datasheet Details

CY7C1460AV33

Cypress Semiconductor

833.98 KB

36-mbit pipelined sram.

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