CY7C1473V33 - (CY7C147xV33) 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM

Product Overview

Cypress Semiconductor

Datasheet Details

Part number	CY7C1473V33
Manufacturer	Cypress Semiconductor
File Size	1.17 MB
Description	(CY7C147xV33) 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM
Datasheet	CY7C1473V33 Datasheet
Additional preview pages of the CY7C1473V33 datasheet.

Product details

Description

[1] The CY7C1471V33, CY7C1473V33 and CY7C1475V33 are 3.3V, 2M x 36/4M x 18/1M x 72 synchronous flow through burst SRAMs designed specifically to support unlimited true back-to-back read or write operations without the insertion of wait states.The CY7C1471V33, CY7C1473V33 and CY7C1475V33 are equipped with the advanced No Bus Latency (NoBL) logic required to enable consecutive read or write operations with data being transferred on every clock cycle.This feature dramatically improves the through

Features

No Bus Latency™ (NoBL™) architecture eliminates dead cycles between write and read cycles.
Supports up to 133 MHz bus operations with zero wait states.
Data is transferred on every clock.
Pin compatible and functionally equivalent to ZBT™ devices.
Internally self timed output buffer control to eliminate the need to use OE.
Registered inputs for flow through operation.
Byte Write capability.
3.3V/2.5V IO supply (VDDQ).

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Other Datasheets by Cypress Semiconductor

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Published: Nov 10, 2007 |