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CY7C2163KV18 18-Mbit QDR II+ SRAM Four-Word Burst Architecture

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Description

CY7C2163KV18/CY7C2165KV18 18-Mbit QDR® II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT 18-Mbit QDR® II+ SRAM Four-Word Burst .

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Datasheet Specifications

Part number
CY7C2163KV18
Manufacturer
Cypress Semiconductor
File Size
623.35 KB
Datasheet
CY7C2163KV18-CypressSemiconductor.pdf
Description
18-Mbit QDR II+ SRAM Four-Word Burst Architecture

Features

* Separate independent read and write data ports
* Supports concurrent transactions
* 550-MHz clock for high bandwidth
* Four-word burst for reducing address bus frequency
* Double data rate (DDR) interfaces on both read and write ports (data transferred at 1100 MHz) at 550 MHz

CY7C2163KV18 Distributors

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Cypress Semiconductor CY7C2163KV18-like datasheet