M12L16161A-7TG2R
ESMT
877.13kb
512k x 16bit x 2banks synchronous dram.
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M12L16161A-7TIG2Q - 512K x 16Bit x 2Banks Synchronous DRAM
(ESMT)
ESMT
SDRAM
M12L16161A (2Q)
Operation Temperature Condition -40°C~85°C
512K x 16Bit x 2Banks Synchronous DRAM
FEATURES
GENERAL DESCRIPTION
z JEDEC .
M12L16161A-5TG2R - 512K x 16Bit x 2Banks Synchronous DRAM
(ESMT)
ESMT
SDRAM
M12L16161A (2R)
512K x 16Bit x 2Banks Synchronous DRAM
FEATURES
GENERAL DESCRIPTION
JEDEC standard 3.3V power supply
The M12L16161A .
M12L16161A-5TIG2Q - 512K x 16Bit x 2Banks Synchronous DRAM
(ESMT)
ESMT
SDRAM
M12L16161A (2Q)
Operation Temperature Condition -40°C~85°C
512K x 16Bit x 2Banks Synchronous DRAM
FEATURES
GENERAL DESCRIPTION
z JEDEC .
M12L128168A-5BG - 2M x 16 Bit x 4 Banks Synchronous DRAM
(ESMT)
ESMT
SDRAM
FEATURES
y JEDEC standard 3.3V power supply y LVTTL patible with multiplexed address y Four banks operation y MRS cycle with address key.
M12L128168A-5BG2N - 2M x 16 Bit x 4 Banks Synchronous DRAM
(ESMT)
ESMT
SDRAM
FEATURES
y JEDEC standard 3.3V power supply y LVTTL patible with multiplexed address y Four banks operation y MRS cycle with address key.
M12L128168A-5BG2S - 2M x 16 Bit x 4 Banks Synchronous DRAM
(ESMT)
ESMT
SDRAM
FEATURES
JEDEC standard 3.3V power supply LVTTL patible with multiplexed address Four banks operation MRS cycle with address key program.
M12L128168A-5BVAG2N - Synchronous DRAM
(ESMT)
ESMT
SDRAM
FEATURES
JEDEC standard 3.3V power supply LVTTL patible with multiplexed address Four banks operation MRS cycle with address key.
M12L128168A-5BVAG2S - 2M x 16 Bit x 4 Banks Synchronous DRAM
(ESMT)
ESMT
SDRAM
FEATURES
JEDEC standard 3.3V power supply LVTTL patible with multiplexed address Four banks operation MRS cycle with address key.
M12L128168A-5BVG2N - Synchronous DRAM
(ESMT)
ESMT
SDRAM
FEATURES
JEDEC standard 3.3V power supply LVTTL patible with multiplexed address Four banks operation MRS cycle with address key.
M12L128168A-5BVG2S - 2M x 16 Bit x 4 Banks Synchronous DRAM
(ESMT)
ESMT
SDRAM
FEATURES
JEDEC standard 3.3V power supply LVTTL patible with multiplexed address Four banks operation MRS cycle with address key.