AS4LC8M8S0 3.3V 4Mx16 and 8Mx8 CMOS synchronous DRAM

Description

Advance information ® AS4LC8M8S0 AS4LC4M16S0 3.3V 4Mx16 and 8Mx8 CMOS synchronous DRAM .
Output disable/write mask Address inputs Bank select inputs Input/output Row address strobe Column address strobe Write enable Chip select Power (3.

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Datasheet Specifications

Part number: AS4LC8M8S0
Manufacturer: ETC
File Size: 566.21 KB
Datasheet: AS4LC8M8S0_ETC.pdf
Description: 3.3V 4Mx16 and 8Mx8 CMOS synchronous DRAM

Features

* PC100/133 compliant
* Organization - 2,097,152 words × 8 bits × 4 banks (8M×8) - 1,048,576 words × 16 bits × 4 banks (4M×16)
* Fully synchronous - All signals referenced to positive edge of clock
* Four internal banks controlled by BA0/BA1 (bank select)
* Hi

Applications

* DRAM commands and functions are decoded from control inputs. Basic commands are as follows:
* Deactivate all banks
* Select row; activate bank
* Mode register set
* Deactivate bank
* Deselect; power down
* CBR refresh
* Select column; write

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AS4LC8M8S0 3.3V 4Mx16 and 8Mx8 CMOS synchronous DRAM ETC

ETC AS4LC8M8S0-like datasheet

AS4LC4M16S0

AS487