AS4LC256K16E0 Datasheet (Alliance Semiconductor) - 3.3V 256K X 16 CMOS DRAM (EDO)

AS4LC256K16E0, 3.3V 256K X 16 CMOS DRAM (EDO)

Address inputs Row address strobe Input/output Output enable Column address strobe, upper byte Column address strobe, lower byte Read/write control Power (3.3V ± 0.3V) Ground I/O6 I/O7 NC NC WE RAS NC A0 A1 A2 AS4LC256K16EO I/O9 I/O8 NC LCAS UCAS OE A8 A7 A6 A5 AS4LC256K16EO 1 2 3 4 5 6 7 8 9 1

AS4LC256K16E0 Features

* Organization: 262,144 words × 16 bits

* High speed - 45/60 ns RAS access time - 10/12/15/20 ns column address access time - 7/10/10 ns CAS access time

* Low power consumption

* EDO page mode

* 5V I/O tolerant

* 512 refresh cycles, 8 ms refresh inte