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AS4LC4M4F1 4M x 4 CMOS DRAM

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Description

www.DataSheet4U.com May 2001 ® AS4LC4M4F1 4M×4 CMOS DRAM (Fast Page) 3.3V Family .
Address inputs Row address strobe Column address strobe Write enable Input/output Output enable Power Ground AS4LC4M4F1. TSOP availability to be.

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Features

* Organization: 4,194,304 words × 4 bits
* High speed - 50/60 ns RAS access time - 25/30 ns column address access time - 12/15 ns CAS access time
* Refresh - 2048 refresh cycles, 32 ms refresh interval - RAS-only or CAS-before-RAS refresh or self-refresh
* TTL-compa

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