AS4LC4M4F1 Datasheet (Alliance Semiconductor)

AS4LC4M4F1, 4M x 4 CMOS DRAM

Address inputs Row address strobe Column address strobe Write enable Input/output Output enable Power Ground AS4LC4M4F1 *TSOP availability to be determined Selection guide Symbol Maximum RAS access time Maximum column address access time Maximum CAS access time Maximum output enable (OE) acce

AS4LC4M4F1 Features

* Organization: 4,194,304 words × 4 bits

* High speed - 50/60 ns RAS access time - 25/30 ns column address access time - 12/15 ns CAS access time

* Refresh - 2048 refresh cycles, 32 ms refresh interval - RAS-only or CAS-before-RAS refresh or self-refresh

* TTL-compa