GTLP16612 Datasheet (Fairchild Semiconductor) - CMOS 18-Bit TTL/GTLP Universal Bus Transceiver

GTLP16612, CMOS 18-Bit TTL/GTLP Universal Bus Transceiver

The GTLP16612 is an 18-bit universal bus transceiver which provides TTL to GTLP signal level translation.

The device is designed to provide a high speed interface between cards operating at TTL logic levels and a backplane operating at GTLP logic levels.

High speed backplane operation is a direct re

GTLP16612 Features

* s Bidirectional interface between GTLP and TTL logic levels s Designed with Edge Rate Control Circuit to reduce output noise s VREF pin provides external supply reference voltage for receiver threshold s Submicron Core CMOS technology for low power dissipation s Special PVT Compensation circuitry to