GTLP17T616 Datasheet (Fairchild Semiconductor) - 17-Bit LVTTL/GTLP Bus Transceiver

GTLP17T616, 17-Bit LVTTL/GTLP Bus Transceiver

The GTLP17T616 is a 17-bit registered bus transceiver that provides LVTTL to GTLP signal level translation.

It allows for transparent, latched and clocked modes of data flow and provides a buffered GTLP (CLKOUT) clock output from the LVTTL CLKAB.

The device provides a high speed interface between ca

GTLP17T616 Features

* s Bidirectional interface between GTLP and LVTTL logic levels s Edge Rate Control to minimize noise on the GTLP port s Power up/down high impedance for live insertion s External VREF pin for receiver threshold adjustability s BiCMOS technology for low power dissipation s Bushold data inputs on A Por