HD74LVC373A Datasheet (Hitachi Semiconductor)

HD74LVC373A, Octal D-type Transparent

The HD74LVC373A has eight D type latches with three state outputs in a 20 pin package.

When the latch enable input is high, the Q outputs will follow the D inputs.

When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high again.

When a high

HD74LVC373A Features

* VCC = 2.0 V to 5.5 V All inputs VIH (Max.) = 5.5 V (@V CC = 0 V to 5.5 V) All outputs VOUT (Max.) = 5.5 V (@VCC = 0 V or output off state) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) Typical VOH undershoot > 2.0 V (@VCC = 3.