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H55S1262EFP-A3E Datasheet - Hynix Semiconductor

H55S1262EFP-A3E 128MBit MOBILE SDR SDRAMs based on 2M x 4Bank x16 I/O

and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 1.2 /Aug. 2009 1 11 128Mbit (8Mx16bit) Mobile SDR Memory H55S1262EFP Series www.DataSheet4U.com Document Title 4Bank x 2M x 16bits Synchronous DRAM .

H55S1262EFP-A3E Features

* Standard SDRAM Protocol Clock Synchronization Operation - All the commands registered on positive edge of basic input clock (CLK) MULTIBANK OPERATION - Internal 4bank operation - During burst Read or Write operation, burst Read or Write for a different bank is performed. - During b

H55S1262EFP-A3E Datasheet (796.95 KB)

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Datasheet Details

Part number:

H55S1262EFP-A3E

Manufacturer:

Hynix Semiconductor

File Size:

796.95 KB

Description:

128mbit mobile sdr sdrams based on 2m x 4bank x16 i/o.

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H55S1262EFP-A3E 128MBit MOBILE SDR SDRAMs based 4Bank x16 Hynix Semiconductor

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