* Voltage: VDD, VDDQ 3.3V supply voltage
* 4096 Refresh cycles / 64ms
* All device pins are compatible with LVTTL interface
* Programmable Burst Length and Burst Type
* 54 Pin TSOPII (Lead or Lead Free Package) - 1, 2, 4, 8 or full page for Sequential Burs
HY57V281620ET Datasheet (120.33 KB)
HY57V281620ET
Hynix Semiconductor
120.33 KB
Synchronous dram memory 128mbit (8m x 16bit).
128Mb Synchronous DRAM based on 2M x 4Bank x16 I/O
Document Title
4Bank x 2M x 16bits Synchronous DRAM
Revision History
Revision No.
History
1.0
.
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