HY5DU28422DT - (HY5DU28xx22D(L)T) 128Mb-S DDR SDRAM
and is subject to change without notice.
Hynix semiconductor does not assume any responsibility for use of circuits described.
No patent licenses are implied.
Rev.
0.0/Apr.
2003 1 DataSheet4U.com www.DataSheet4U.com HY5DU28422D(L)T HY5DU28822D(L)T HY5DU281622D(L)T Revision History 1.
Rev 0.0 (Ap
HY5DU28422DT Features
* VDD, VDDQ = 2.6V +/- 0.1V All inputs and outputs are compatible with SSTL_2 interface Fully differential clock inputs (CK, /CK) operation Double data rate interface Source synchronous - data transaction aligned to bidirectional da
