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HY5DU561622AT - (HY5DU56xx22A(L)T) 256M-S DDR SDRAM

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Hynix Semiconductor

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HY5DU561622AT (HY5DU56xx22A(L)T) 256M-S DDR SDRAM by Hynix Semiconductor - Datasheet Preview — Datasheet preview – HY5DU561622AT

Datasheet Details

Part number	HY5DU561622AT
Manufacturer	Hynix Semiconductor
File Size	529.85 KB
Description	(HY5DU56xx22A(L)T) 256M-S DDR SDRAM
Datasheet	HY5DU561622AT Datasheet
Additional preview pages of the HY5DU561622AT datasheet.

Product details

Description

and is subject to change without notice. VDDQ) & max (0.51

Features

VDD, VDDQ = 2.5V +/- 0.2V All inputs and outputs are compatible with SSTL_2 interface Fully differential clock inputs (CK, /CK) operation Double data rate interface Source synchronous - data transaction aligned to bidirectional data strobe (DQS).
All addresses and control inputs except data, data strobes and data masks latched on the rising edges of the clock Programmable CAS latency 1.5, 2, 2.5 an.

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Published: Oct 10, 2006 |