HY5DU561622DT - (HY5DU56xx22DT) 256Mb DDR SDRAM
and is subject to change without notice.
Hynix Semiconductor does not assume any responsibility for use of circuits described.
No patent licenses are implied.
Rev.
1.0 /Oct.
2004 1 www.DataSheet4U.com HY5DU56422D(L)T HY5DU56822D(L)T HY5DU561622D(L)T Revision History Revision No.
History First Ver
HY5DU561622DT Features
* VDD, VDDQ = 2.5V +/- 0.2V for DDR200, 266, 333 VDD, VDDQ = 2.6V +/- 0.1V for DDR400 All inputs and outputs are compatible with SSTL_2 interface Fully differential clock inputs (CK, /CK) operation
* All addresses and control inputs except data, data strobes and data masks latched on the ri
